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INTEGRATED CIRCUITS
PCA9536 4-bit I2C and SMBus I/O port
Objective data sheet 2004 Aug 20
Philips Semiconductors
Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
DESCRIPTION
The PCA9536 is 8-pin CMOS devices that provides 4 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C/SMBus applications and were developed to enhance the Philips family of I@C I/O expanders. I/O expanders provides a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, LEDs, fans, etc. The PCA9536 consists of a 4-bit Configuration register (Input or Output selection); 4-bit Input register, 4-bit Output register and an 4-bit Polarity inversion register (Active-HIGH or Active-LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion Register. All registers can be read by the system master. The power-on reset sets the registers to their default values and initializes the device state machine. The I2C address is fixed and allows only one device on the same I2C/SMBus.
FEATURES
* 4-bit I2C GPIO * Operating power supply voltage range of 2.3 to 5.5 V * 5 V tolerant I/Os * Polarity inversion register * Active low interrupt output * Low stand-by current * Noise filter on SCL/SDA inputs * No glitch on power-up * Internal power-on reset * 4 I/O pins which default to 4 inputs with 100 k internal pull-up * 0 to 400 kHz clock frequency * ESD protection exceeds 2000 V HBM per JESD22-A114, * Latch-up testing is done to JESDEC Standard JESD78 which * Two packages offered: SO8 and TSSOP8
ORDERING INFORMATION
PACKAGES 8-Pin Plastic SO (wide) 8-Pin Plastic TSSOP TEMPERATURE RANGE -40 C to +85 C -40 C to +85 C exceeds 100 mA 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 resistor
ORDER CODE PCA9536D PCA9536DP
TOPSIDE MARK PCA9536 9536
DRAWING NUMBER SOT96-1 SOT505-1
Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent.
2004 Aug 20
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
PIN CONFIGURATION
I/O0 1 I/O1 2 I/O2 3 GND 4 8 7 6 5 VDD SDA SCL I/O3
SW02190
Figure 1. Pin configuration
PIN DESCRIPTION
PIN NUMBER 1, 2, 3, 5 4 6 7 8 SYMBOL I/O0-3 VSS SCL SDA VDD I/O0 to I/O3 Supply ground Serial clock line Serial data line Supply voltage FUNCTION
BLOCK DIAGRAM
PCA9536
I/O0 SCL SDA INPUT FILTER I2C/SMBUS CONTROL 4-BIT INPUT/ OUTPUT PORTS
I/O1
WRITE pulse READ pulse
I/O2
I/O3 VDD POWER-ON RESET VSS NOTE: ALL I/Os ARE SET TO INPUTS AT RESET
SW02191
Figure 2. Block diagram
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
REGISTERS Command Byte
Command 0 1 2 3 Protocol Read byte Read/write byte Read/write byte Read/write byte Function Input port register Output port register Polarity inversion register Configuration register
Register 2 - Polarity Inversion Register
bit
default
X 0
X 0
X 0
X 0
N3 0
N2 0
N1 0
N0 0
This register allows the user to invert the polarity of the Input Port Register data. If a bit in this register is set (written with `1'), the corresponding Input Port data is inverted. If a bit in this register is cleared (written with a `0'), the Input Port data polarity is retained. "X" are "don't care" bits and can be programmed with either "0" or "1".
The command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read.
Register 0 - Input Port Register
bit
default
Register 3 - Configuration Register
I2 1 I1 1 I0 1 bit
default
X 1
X 1
X 1
X 1
I3 1
X 1
X 1
X 1
X 1
C3 1
C2 1
C1 1
C0 1
This register is a read only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by Register 3. Writes to this register have no effect. "X" are "don't care" bits and can be programmed with either "0" or "1".
This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs with a weak pull-up to VDD. "X" are "don't care" bits and can be programmed with either "0" or "1".
Register 1 - Output Port Register
bit
default
X 1
X 1
X 1
X 1
O3 1
O2 1
O1 1
O0 1
Power-on Reset
When power is applied to VDD, an internal power-on reset holds the PCA9536 in a reset condition until VDD has reached VPOR. At that point, the reset condition is released and the PCA9536 registers and state machine will initialize to their default states. Thereafter, VDD must be lowered below 0.2 V to reset the device. For a power reset cycle, VDD must be lowered below 0.2 V and then restored to the operating voltage.
This register reflects the outgoing logic levels of the pins defined as outputs by Register 3. Bit values in this register have no effect on pins defined as inputs. Reads from this register return the value that is in the flip-flop controlling the output selection, NOT the actual pin value. "X" are "don't care" bits and can be programmed with either "0" or "1".
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
SIMPLIFIED SCHEMATIC OF I/O0 TO I/O3
DATA FROM SHIFT REGISTER CONFIGURATION REGISTER DATA FROM SHIFT REGISTER D FF WRITE CONFIGURATION PULSE WRITE PULSE CK Q D FF I/O0 TO I/O3 CK Q Q2 ESD PROTECTION DIODE Q Q Q1 100 k ESD PROTECTION DIODE OUTPUT PORT REGISTER DATA VDD
OUTPUT PORT REGISTER INPUT PORT REGISTER D FF READ PULSE CK Q Q
VSS
INPUT PORT REGISTER DATA
DATA FROM SHIFT REGISTER WRITE POLARITY PULSE
D FF CK
Q
POLARITY REGISTER DATA
Q
POLARITY INVERSION REGISTER
SW02192
NOTE: At Power-on Reset, all registers return to default values. Figure 3. Simplified schematic of I/O0 to I/O3
I/O port
When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a high impedance input with a weak pull-up (100 k typ.) to VDD. The input voltage may be raised above VDD to a maximum of 5.5 V. If the I/O is configured as an output, then either Q1 or Q2 is enabled, depending on the state of the output port register. Care should be exercised if an external voltage is applied to an I/O configured as an output because of the low impedance paths that exist between the pin and either VDD or VSS.
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
Device address
SLAVE ADDRESS
1
0
0
0
0
0
1
R/W
FIXED
SW02193
Figure 4. PCA9536 address
Bus transactions
Data is transmitted to the PCA9536 registers using the write mode as shown in Figures 5 and 6. Data is read from the PCA9536 registers using the read mode as shown in Figures 7 and 8. These devices do not implement an auto-increment function so once a command byte has been sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent.
SCL
1
2
3
4
5
6
7
8
9 command byte
slave address
data to port
SDA
S
1
0
0
0
0
0
1
0 R/W
A
0
0
0
0
0
0
0
1
A acknowledge from slave
DATA 1
A
P
start condition
acknowledge from slave
acknowledge from slave
WRITE TO PORT
DATA OUT FROM PORT tpv
DATA 1 VALID
SW02194
Figure 5. WRITE to output port register
SCL
1
2
3
4
5
6
7
8
9
slave address
command byte
data to register
SDA
S
1
0
0
0
0
0
1
0 R/W
A
0
0
0
0
0
0
1
1/0
A acknowledge from slave
DATA
A
P
start condition
acknowledge from slave
acknowledge from slave
DATA TO REGISTER
SW02195
Figure 6. WRITE to configuration or polarity inversion registers
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
slave address
acknowledge from slave
acknowledge from slave
slave address
acknowledge from slave
data from register
acknowledge from master
S
1
0
0
0
0
0
1
0 R/W
A
COMMAND BYTE
A
S
1
0
0
0
0
0
1
1 R/W
A
DATA first byte
A
at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter data from register no acknowledge from master
DATA last byte
NA
P
SW02196
Figure 7. READ from register
SCL
1
2
3
4
5
6
7
8
9 data from port data from port
slave address
SDA
S
1
0
0
0
0
0
1
1 R/W
A acknowledge from slave
DATA 1
A acknowledge from master
DATA 4
NA
P stop condition
start condition
no acknowledge from master
READ FROM PORT
DATA INTO PORT tph
DATA 2
DATA 3 tps
DATA 4
SW02197
NOTES: 1. This figure assumes the command byte has previously been programmed with 00h. 2. Transfer of data can be stopped at any moment by a stop condition. Figure 8. READ input port register
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
TYPICAL APPLICATION
VDD 2 k VDD SCL SDA GND I/O2 RESET I/O3 1.8 k 1.8 k VDD MASTER CONTROLLER SCL SDA I/O1 INT I/O0 SUBSYSTEM 1 (e.g. temp sensor)
PCA9536
VSS
SUBSYSTEM 2 (e.g. counter)
A Controlled Switch (e.g. CBT device) ENABLE
B NOTE: Device address is 1000001 I/O0, I/O2, I/O3, configured as outputs I/O1, configured as input
SW02198
Figure 9. Typical application
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL VDD II VI/O II/O IDD ISS Ptot Tstg Tamb TJ(MAX) Supply voltage DC input current DC voltage on an I/O DC output current on an I/O Supply current Supply current Total power dissipation Storage temperature range Operating ambient temperature Maximum junction temperature PARAMETER CONDITIONS MIN -0.5 -- VSS - 0.5 -- -- -- -- -65 -40 -- MAX 6.0 20 5.5 50 85 100 200 +150 +85 +125 UNIT V mA V mA mA mA mW C C C
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under "Handling MOS devices".
DC CHARACTERISTICS
SYMBOL Supplies VDD IDD Istbl Istbh VPOR VIL VIH IOL IL CI I/Os VIL VIH Supply voltage Supply current Standby current Standby current
VDD = 2.3 to 5.5 V; VSS = 0 V; Tamb = -40 C to +85 C; unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNIT
2.3 Operating mode; VDD = 5.5 V; no load; fSCL = 100 kHz Standby mode; VDD = 5.5 V; no load; VI = VSS; fSCL = 0 kHz; I/O = inputs Standby mode; VDD = 5.5 V; no load; VI = VDD; fSCL = 0 kHz; I/O = inputs No load; VI = VDD or VSS -- -- -- --
-- 104 225 0.25 1.5
5.5 175 350 1 1.65
V A A A V
Power-on reset voltage (Note 1)
input SCL; input/output SDA LOW-level input voltage HIGH-level input voltage LOW-level output current Leakage current Input capacitance VOL = 0.4 V VI = VDD = VSS VI = VSS -0.5 0.7 VDD 3 -1 -- -- -- tbd -- 6 0.3 VDD 5.5 -- +1 10 V V mA A pF
LOW-level input voltage HIGH-level input voltage VOL = 0.5 V; VDD = 2.3 V; Note 2 VOL = 0.7 V; VDD = 2.3 V; Note 2
-0.5 2.0 8 10 8 10 8 10 1.8 1.7 2.6 2.5 4.1 4.0 -- -- -- --
-- -- 10 13 17 24 14 19 -- -- -- -- -- -- -- -- 3.7 3.7
0.8 5.5 -- -- -- -- -- -- -- -- -- -- -- -- 1 -100 5 5
V V mA mA mA mA mA mA V V V V V V A A pF pF
IO OL
LOW-level LOW level output current
VOL = 0.5 V; VDD = 4.5 V; Note 2 VOL = 0.7 V; VDD = 4.5 V; Note 2 VOL = 0.5 V; VDD = 3.0 V; Note 2 VOL = 0.7 V; VDD = 3.0 V; Note 2 IOH = -8 mA; VDD = 2.3 V; Note 3 IOH = -10 mA; VDD = 2.3 V; Note 3
VO OH
HIGH-level HIGH level output voltage
IOH = -8 mA; VDD = 3.0 V; Note 3 IOH = -10 mA; VDD = 3.0 V; Note 3 IOH = -8 mA; VDD = 4.75 V; Note 3 IOH = -10 mA; VDD = 4.75 V; Note 3
IIH IIL CI CO
Input leakage current Input leakage current Input capacitance Output capacitance
VDD = 3.6 V; VI = VDD VDD = 5.5 V; VI = VSS
NOTES: 1. VDD must be lowered to 0.2 V in order to reset part. 2. The total current sunk by all I/Os must be limited to 100 mA. 3. The total current sourced by all I/Os must be limited to 85 mA.
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
AC SPECIFICATIONS
SYMBOL fSCL tBUF tHD;STA tSU;STA tSU;STO tHD;DAT tVD;ACK tVD;DAT tSU;DAT tLOW tHIGH tF tR tSP Port Timing tPV tPS tPH Output data valid Input data setup time Input data hold time -- 100 1 200 -- -- -- 100 1 200 -- -- ns ns s PARAMETER Operating frequency Bus free time between STOP and START conditions Hold time after (repeated) START condition Repeated START condition setup time Setup time for STOP condition Data in hold time Valid time for ACK Data setup time Clock LOW period Clock HIGH period Clock/Data fall time Clock/Data rise time Pulse width of spikes that must be suppressed by the input filters condition2 Data out valid time3 STANDARD MODE I2C-bus MIN 0 4.7 4.0 4.7 4.0 0 0.3 300 250 4.7 4.0 -- -- -- MAX 100 -- -- -- -- -- 3.45 -- -- -- -- 300 1000 50 FAST MODE I2C-bus MIN 0 1.3 0.6 0.6 0.6 0 0.1 50 100 1.3 0.6 20 + 0.1 Cb1 20 + 0.1 Cb --
1
UNITS kHz s s s s ns s ns ns s s ns ns ns
MAX 400 -- -- -- -- -- 0.9 -- -- -- -- 300 300 50
NOTES: 1. Cb = total capacitance of one bus line in pF. 2. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW. 3. tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
SDA
tF
tLOW
tR
tSU;DAT
tF
tHD;STA
tSP
tR
tBUF
SCL
S
tHD;STA
tHD;DAT tHIGH
tSU;STA
SR
tSU;STD
P
S
SU01469
Figure 10. Definition of timing
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
PROTOCOL
START CONDITION (S)
BIT 7 MSB (A7)
BIT 6 (A6)
BIT 0 (R/W)
ACKNOWLEDGE (A)
STOP CONDITION (S)
t
SU;STA
t
LOW
t HIGH
1 / f SCL
SCL
t
BUF
tr
t f
SDA
t HD;STA
t
SU;DAT
t
HD;DAT
t
tSU;STO VD;DAT t VD;ACK
SW02210
Figure 11. I2C-bus timing diagram; rise and fall times refer to VIL and VIH
VDD RL = 500 VI PULSE GENERATOR RT D.U.T. CL 50 pF VO
VDD Open
DEFINITIONS
RL = Load resistor. CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to the output impedance ZO of the pulse generators.
SW02181
Figure 12. Test circuitry for switching times
From Output Under Test CL = 50 pF
500
2VDD S1 Open GND
500
Load Circuit
TEST tpv
S1 2 VDD
SA00652
Figure 13. Test circuit
2004 Aug 20
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
2004 Aug 20
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm
SOT505-1
2004 Aug 20
14
Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
REVISION HISTORY
Rev _1 Date 20040820 Description Objective data sheet (9397 750 12895).
2004 Aug 20
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Philips Semiconductors
Objective data sheet
4-bit I2C and SMBus I/O port
PCA9536
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011.
Data sheet status
Level
I
Data sheet status [1]
Objective data sheet
Product status [2] [3]
Development
Definitions
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data sheet
Qualification
III
Product data sheet
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products--including circuits, standard cells, and/or software--described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2004 All rights reserved. Printed in U.S.A. Date of release: 08-04
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 12895
Philips Semiconductors
2004 Aug 20 16

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